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Mosc is a transistor-level verification tool for combinational circuits. It supports both transistor and gate netlists and can prove the formal equivalence between two such netlists. It is a fast and reliable tool to analyze the low-level logic structure of an IC.
This package is made up of two programs: dump_tran and mosc. dump_tran reads in a transistor-level netlist, computes logic functions that are equivalent to that structure and then it outputs them in a specified format. mosc reads in a transistor-level netlist and a gate-level netlist and verifies if they are equivalent.
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